更新日：2024-12-02
J-Linkソフトウエアパッケージの「J-Link Commander」コマンドラインツールからRZ/T2Hマイコンのレジスタ設定、IOメモリ空間、フラッシュROMアクセスが可能です。フラッシュローダ対応フラッシュメモリデバイスの場合は、コマンドライン操作でフラッシュ書込みも可能です。「J-Link Commander」ツール操作はすべてのJ-Link/Flasherモデル（最新版のHWバージョン）は使用可能です。
以下、RZ/T2H EV-KIT評価ボード環境での操作順を説明します。
CN60又はCN61コネクタにJ-Linkを接続してRZ/T2H EV-KIT評価ボードに電源を入れます。
J-Link Softwareパッケージの「J-Link Commander」ツールを起動します。「connect」コマンドを実行してRZ/T2Hデバイス（メインコア：Cortex-R52_0）「デバイス名：R9A09G077M44_R52_0」を選択します。ターゲットインターフェースモードにSWDを選択して、デバッグクロック（例：8000kHz）を設定してデバッグポート接続を確認します。
SEGGER J-Link Commander V8.10i (Compiled Nov 27 2024 12:19:45) DLL version V8.10i, compiled Nov 27 2024 12:18:52 Connecting to J-Link via USB...O.K. Firmware: J-Link V12 compiled Oct 9 2024 10:52:31 Hardware version: V12.00 J-Link uptime (since boot): 0d 02h 30m 59s S/N: 60201xxxx License(s): RDI, FlashBP, FlashDL, JFlash, GDB USB speed mode: High speed (480 MBit/s) VTref=3.295V Type "connect" to establish a target connection, '?' for help J-Link>connect Please specify device / core.: R9A09G077M44_R52_0 Type '?' for selection dialog Device>R9A09G077M44_R52_0 Please specify target interface: J) JTAG (Default) S) SWD T) cJTAG TIF>S Specify target interface speed [kHz]. : 4000 kHz Speed>8000 Device "R9A09G077M44_R52_0" selected. Connecting to target via SWD ConfigTargetSettings() start ConfigTargetSettings() end - Took 28us InitTarget() start Authenticated device detected. Skipping authentication process. OCDREG_STATUS: 0x00000001 InitTarget() end - Took 1.97ms Found SW-DP with ID 0x6BA02477 DPIDR: 0x6BA02477 CoreSight SoC-400 or earlier AP map detection skipped. Manually configured AP map found. AP[0]: APB-AP (IDR: Not set, ADDR: 0x00000000) AP[1]: APB-AP (IDR: Not set, ADDR: 0x00000000) AP[2]: AXI-AP (IDR: Not set, ADDR: 0x00000000) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found DebugRegs + CTI manually specified. ROM table scan skipped. Cortex-R52 @ 0x80410000 (configured) CoreCTI @ 0x80420000 (configured) Debug architecture: ARMv8.0 8 code breakpoints, 8 data breakpoints Processor features: EL0 support: AArch32 EL1 support: AArch32 EL2 support: AArch32 EL3 support: N/A FPU support: Single + Double + Conversion Add. info (CPU temp. halted) Current exception level: EL1 Exception level AArch usage: EL0: AArch32 EL1: AArch32 EL2: AArch32 EL3: AArch32 Non-secure status: Non-secure Cache info: Inner cache boundary: none LoU Uniprocessor: 1 LoC: 1 LoU Inner Shareable: 1 I-Cache L1: 16 KB, 64 Sets, 64 Bytes/Line, 4-Way D-Cache L1: 16 KB, 64 Sets, 64 Bytes/Line, 4-Way Memory zones: Zone: "Default" Description: Default access mode Zone: "AP0" Description: MEM-AP (APB-AP) Zone: "AP1" Description: MEM-AP (APB-AP) Zone: "AP2" Description: MEM-AP (AXI-AP) Cortex-R52 identified. J-Link>
「r」コマンドでリセット処理を実行します。「h」コマンドでCPUを停止状態に設定してCPUレジスタ内容を確認します。
J-Link>r Reset delay: 0 ms ResetTarget() start Reset: Halt core immediately after reset using reset catch. Authenticated device detected. Skipping authentication process. OCDREG_STATUS: 0x00000001 Disabled core power domain detected. Enabling debug mode... ResetTarget() end - Took 222ms Device specific reset executed. J-Link>h PC = 0010200C CPSR = 800001DA (AArch32, HYP mode, IRQ masked, FIQ masked, A32, Little endian) SP (R13) = 00000000 LR (R14) = 00102000 R0 = 009538D1 R1 = 02FAF07F R2 = 00000000 R3 = 00000000 R4 = 00000000 R5 = 00000000 R6 = 00000000 R7 = 00000000 R8 = 00000000 R9 = 00000000 R10 = 00000000 R11 = 00000000 R12 = 00000000 SPSR_ABT = 00000000 SPSR_SVC = 00000000 SPSR_HYP = 000001DA SPSR_FIQ = 00000000 SPSR_IRQ = 00000000 SPSR_UND = 00000000 J-Link>
「mem32」コマンドでI/Oレジスタ（32bit）のデータ読み出しを実行します。
J-Link>mem 0x50000000, 100 50000000 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 50000010 = 00 00 00 00 4C 00 00 50 00 60 00 00 00 20 10 00 ....L..P.`... .. 50000020 = 00 00 00 00 00 00 00 00 FF FF FF 00 00 00 07 00 ................ 50000030 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 50000040 = 00 00 00 00 06 00 00 00 67 D1 01 00 00 00 A0 E3 ........g....... 50000050 = 7F 10 0F E3 FA 12 40 E3 01 00 90 E2 01 00 50 E1 ......@.......P. 50000060 = FC FF FF 1A 83 07 0B E3 00 00 40 E3 30 0F 81 EE ..........@.0... 50000070 = 11 1F 91 EE 02 12 81 E3 11 1F 81 EE 38 00 9F E5 ............8... 50000080 = 10 0F 0C EE 10 1F 1F EE 02 10 81 E3 01 10 81 E3 ................ 50000090 = 4F F0 7F F5 10 1F 0F EE 6F F0 7F F5 00 00 0F E1 O.......o....... 500000A0 = 1F 00 C0 E3 13 00 80 E3 00 F3 6E E1 0C 10 9F E5 ..........n..... 500000B0 = 01 F3 2E E1 6E 00 60 E1 1E FF 2F E1 00 00 00 00 ....n.`.../..... 500000C0 = 7C 20 10 00 00 BE 70 47 11 00 02 F1 28 D0 9F E5 | ....pG....(... 500000D0 = 12 00 02 F1 24 D0 9F E5 17 00 02 F1 20 D0 9F E5 ....$....... ... 500000E0 = 1B 00 02 F1 1C D0 9F E5 1F 00 02 F1 18 D0 9F E5 ................ 500000F0 = 13 00 02 F1 14 D0 9F E5 05 00 00 EA 90 7C 10 00 .............|.. J-Link> J-Link>
※J-Link Commanderプロンプトから使用可能なコマンド一覧は以下URLのページからご確認ください。
https://wiki.segger.com/J-Link_Commander
XSPI0_CS0（0x40000000～）空間のQSPIフラッシュから起動するようにRZ/T2H EV-KITボードのブートモードを設定してボードに電源を入れます。
「J-Link Commander」ツールを起動し「connect」コマンドを実行してRZ/T2Hデバイス（R9A09G077M44_R52_0コア）に接続します。
J-Linkプロンプトから以下順にコマンドを実行してQSPIフラッシュデータのERASE、ファイルデータの書き込み及びデータベリファイ処理を確認します。※以下の事例に2MByteのバイナリデータをXSPI0 SPIフラッシュに書き込みます。
J-Link>exec EnableEraseAllFlashBanks J-Link>erase 0x40000000 0x401FFFFF 'erase': Performing implicit reset & halt of MCU. ResetTarget() start Reset: Halt core immediately after reset using reset catch. Authenticated device detected. Skipping authentication process. OCDREG_STATUS: 0x00000001 Disabled core power domain detected. Enabling debug mode... ResetTarget() end - Took 213ms Device specific reset executed. Erasing selected range... J-Link: Flash download: Total time needed: 8.088s (Prepare: 0.383s, Compare: 0.000s, Erase: 7.640s, Program: 0.000s, Verify: 0.000s, Restore: 0.064s) J-Link: Flash download: Flash sectors within Range [0x40000000 - 0x401FFFFF] deleted. Erasing done. J-Link>mem 0x40000000, 40 40000000 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 40000010 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 40000020 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 40000030 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ J-Link>loadfile C:\Workspace\RZ\firmware.bin 0x40000000 'loadfile': Performing implicit reset & halt of MCU. ResetTarget() start Reset: Halt core immediately after reset using reset catch. Authenticated device detected. Skipping authentication process. OCDREG_STATUS: 0x00000001 Disabled core power domain detected. Enabling debug mode... ResetTarget() end - Took 222ms Device specific reset executed. Downloading file [C:\Workspace\RZ\firmware.bin]... J-Link: Flash download: Bank 0 @ 0x40000000: 1 range affected (65536 bytes) J-Link: Flash download: Total: 7.259s (Prepare: 0.376s, Compare: 6.413s, Erase: 0.236s, Program: 0.066s, Verify: 0.101s, Restore: 0.064s) J-Link: Flash download: Program speed: 969 KB/s O.K. J-Link>verifybin C:\Workspace\RZ\firmware.bin 0x40000000 Loading binary file C:\Workspace\RZ\firmware.bin Reading 2097152 bytes data from target memory @ 0x40000000. Verify successful. J-Link>mem 0x40000000, 40 40000000 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 40000010 = 00 00 00 00 4C 00 00 50 00 60 00 00 00 20 10 00 ....L..P.`... .. 40000020 = 00 00 00 00 00 00 00 00 FF FF FF 00 00 00 07 00 ................ 40000030 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ J-Link>
XSPI1_CS0（0x50000000～）空間のQSPIフラッシュから起動するようにRZ/T2H EV-KITボードのブートモードを設定してボードに電源を入れます。
「J-Link Commander」ツールを起動し「connect」コマンドを実行してRZ/T2Hデバイス（R9A09G077M44_R52_0コア）に接続します。
J-Linkプロンプトから以下順にコマンドを実行してQSPIフラッシュのERASE、ファイルデータの書き込み及びデータベリファイ処理を確認します。※以下の事例に2MByteのバイナリデータをXSPI1 SPIフラッシュに書き込みます。
J-Link>exec EnableEraseAllFlashBanks J-Link>erase 0x50000000 0x501FFFFF 'erase': Performing implicit reset & halt of MCU. ResetTarget() start Reset: Halt core immediately after reset using reset catch. Authenticated device detected. Skipping authentication process. OCDREG_STATUS: 0x00000001 Disabled core power domain detected. Enabling debug mode... ResetTarget() end - Took 231ms Device specific reset executed. Erasing selected range... J-Link: Flash download: Total time needed: 1.008s (Prepare: 0.368s, Compare: 0.000s, Erase: 0.576s, Program: 0.000s, Verify: 0.000s, Restore: 0.063s) J-Link: Flash download: Flash sectors within Range [0x50000000 - 0x501FFFFF] deleted. Erasing done. J-Link>mem 0x50000000, 40 50000000 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 50000010 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 50000020 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 50000030 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ J-Link>loadfile C:\Workspace\RZ\firmware.bin 0x50000000 'loadfile': Performing implicit reset & halt of MCU. ResetTarget() start Reset: Halt core immediately after reset using reset catch. Authenticated device detected. Skipping authentication process. OCDREG_STATUS: 0x00000001 Disabled core power domain detected. Enabling debug mode... ResetTarget() end - Took 211ms Device specific reset executed. Downloading file [C:\Workspace\RZ\firmware.bin]... J-Link: Flash download: Bank 1 @ 0x50000000: 1 range affected (65536 bytes) J-Link: Flash download: Total: 6.390s (Prepare: 0.369s, Compare: 5.773s, Erase: 0.014s, Program: 0.076s, Verify: 0.091s, Restore: 0.065s) J-Link: Flash download: Program speed: 842 KB/s O.K. J-Link>verifybin C:\Workspace\RZ\firmware.bin 0x50000000 Loading binary file C:\Workspace\RZ\firmware.bin Reading 2097152 bytes data from target memory @ 0x50000000. Verify successful. J-Link>mem 0x50000000, 40 50000000 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 50000010 = 00 00 00 00 4C 00 00 50 00 60 00 00 00 20 10 00 ....L..P.`... .. 50000020 = 00 00 00 00 00 00 00 00 FF FF FF 00 00 00 07 00 ................ 50000030 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ J-Link>
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