更新日：2024-12-02
J-Linkソフトウエアパッケージの「J-Link Commander」コマンドラインツールからRZ/T2Mマイコンのレジスタ設定、IOメモリ空間、フラッシュROMアクセスが可能です。フラッシュローダ対応フラッシュメモリデバイスの場合は、コマンドライン操作でフラッシュ書込みも可能です。「J-Link Commander」ツール操作はすべてのJ-Link/Flasherモデル（最新版のHWバージョン）は使用可能です。
以下、RSK+RZT2M評価ボード環境での操作順を説明します。
J13又はJ20コネクタにJ-Linkを接続してRSKボードに電源を入れます。
J-Link Softwareパッケージの「J-Link Commander」ツールを起動します。「connect」コマンドを実行してRZ/T2Mデバイス名「R9A07G075M2」を選択します。ターゲットインターフェースモードにSWDを選択して、デバッグクロック（例：8000kHz）を設定してデバッグポート接続を確認します。
SEGGER J-Link Commander V8.10e (Compiled Oct 30 2024 17:50:17) DLL version V8.10e, compiled Oct 30 2024 17:47:20 Connecting to J-Link via USB...Updating firmware: J-Link V12 compiled Oct 9 2024 10:52:31 Replacing firmware: J-Link V12 compiled Aug 22 2024 13:27:55 Waiting for new firmware to boot New firmware booted successfully O.K. Firmware: J-Link V12 compiled Oct 9 2024 10:52:31 Hardware version: V12.00 J-Link uptime (since boot): 0d 00h 00m 01s S/N: 60201xxxx License(s): RDI, FlashBP, FlashDL, JFlash, GDB USB speed mode: High speed (480 MBit/s) VTref=3.320V Type "connect" to establish a target connection, '?' for help J-Link>connect Please specify device / core.: R9A07G075M2 Type '?' for selection dialog Device>R9A07G075M2 Please specify target interface: J) JTAG (Default) S) SWD T) cJTAG TIF>S Specify target interface speed [kHz]. : 4000 kHz Speed>8000 Device "R9A07G075M2" selected. Connecting to target via SWD ConfigTargetSettings() start ConfigTargetSettings() end - Took 508us InitTarget() start Authenticated device detected. Skipping authentication process. OCDREG_STATUS: 0x00000001 InitTarget() end - Took 11.1ms Found SW-DP with ID 0x6BA02477 DPIDR: 0x6BA02477 CoreSight SoC-400 or earlier AP map detection skipped. Manually configured AP map found. AP[0]: APB-AP (IDR: Not set, ADDR: 0x00000000) AP[1]: APB-AP (IDR: Not set, ADDR: 0x00000000) AP[2]: AXI-AP (IDR: Not set, ADDR: 0x00000000) Using preconfigured AP[1] as APB-AP AP[1]: APB-AP found DebugRegs + CTI manually specified. ROM table scan skipped. Cortex-R52 @ 0x80410000 (configured) CoreCTI @ 0x80420000 (configured) Debug architecture: ARMv8.0 8 code breakpoints, 8 data breakpoints Processor features: EL0 support: AArch32 EL1 support: AArch32 EL2 support: AArch32 EL3 support: N/A FPU support: Single + Double + Conversion Add. info (CPU temp. halted) Current exception level: EL1 Exception level AArch usage: EL0: AArch32 EL1: AArch32 EL2: AArch32 EL3: AArch32 Non-secure status: Non-secure Cache info: Inner cache boundary: none LoU Uniprocessor: 1 LoC: 1 LoU Inner Shareable: 1 I-Cache L1: 16 KB, 64 Sets, 64 Bytes/Line, 4-Way D-Cache L1: 16 KB, 64 Sets, 64 Bytes/Line, 4-Way Memory zones: Zone: "Default" Description: Default access mode Zone: "AP0" Description: MEM-AP (APB-AP) Zone: "AP1" Description: MEM-AP (APB-AP) Zone: "AP2" Description: MEM-AP (AXI-AP) Cortex-R52 identified. J-Link>
「r」コマンドでリセット処理を実行します。「h」コマンドでCPUを停止状態に設定してCPUレジスタ内容を確認します。
J-Link>r Reset delay: 0 ms ResetTarget() start Reset: Halt core immediately after reset using reset catch. Authenticated device detected. Skipping authentication process. OCDREG_STATUS: 0x00000001 Disabled core power domain detected. Enabling debug mode... ResetTarget() end - Took 229ms Device specific reset executed. J-Link>h PC = 00102010 CPSR = 000001DA (AArch32, HYP mode, IRQ masked, FIQ masked, A32, Little endian) SP (R13) = 00101FB8 LR (R14) = 0010007D R0 = 00508620 R1 = 02FAF07F R2 = 0000A500 R3 = 80281300 R4 = 00102000 R5 = 0BB92CAF R6 = 079D51D7 R7 = 078787A8 R8 = 074759F7 R9 = 078787A8 R10 = F446D350 R11 = 00000000 R12 = E51FF004 SPSR_ABT = 00000000 SPSR_SVC = 00000000 SPSR_HYP = 000001DA SPSR_FIQ = 00000000 SPSR_IRQ = 00000000 SPSR_UND = 00000000 J-Link>
「mem32」コマンドでI/Oレジスタ（32bit）のデータ読み出しを実行します。「Write4」コマンドで32-bit I/Oレジスタのデータ書き込みを確認します。
J-Link>mem32 0x80210000,1 80210000 = 00001018 J-Link>mem32 0x80210050,1 80210050 = 00000000 J-Link>Write4 0x80210050 0xA55A0019 Writing A55A0019 -> 80210050 J-Link>mem32 0x80210050,1 80210050 = 00000099 J-Link> J-Link>mem 0x70000000, 100 70000000 = 00 00 00 00 00 0C DB 36 00 05 00 00 00 00 00 00 .......6........ 70000010 = 00 00 00 00 4C 00 00 70 00 60 00 00 00 20 10 00 ....L..p.`... .. 70000020 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 70000030 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 70000040 = 00 00 00 00 00 00 00 00 37 38 01 00 00 00 A0 E3 ........78...... 70000050 = 7F 10 0F E3 FA 12 40 E3 01 00 90 E2 01 00 50 E1 ......@.......P. 70000060 = FC FF FF 1A 83 07 0B E3 00 00 40 E3 30 0F 81 EE ..........@.0... 70000070 = 11 1F 91 EE 80 15 81 E3 11 1F 81 EE A4 03 9F E5 ................ 70000080 = 10 0F 0C EE 10 1F 1F EE 02 10 81 E3 01 10 81 E3 ................ 70000090 = 4F F0 7F F5 10 1F 0F EE 6F F0 7F F5 00 00 0F E1 O.......o....... 700000A0 = 1F 00 C0 E3 13 00 80 E3 00 F3 6E E1 88 13 9F E5 ..........n..... 700000B0 = 01 F3 2E E1 6E 00 60 E1 1E FF 2F E1 60 03 9F E5 ....n.`.../.`... 700000C0 = 11 00 02 F1 00 D0 A0 E1 5C 03 9F E5 12 00 02 F1 ........\....... 700000D0 = 00 D0 A0 E1 54 03 9F E5 17 00 02 F1 00 D0 A0 E1 ....T........... 700000E0 = 4C 03 9F E5 1B 00 02 F1 00 D0 A0 E1 44 03 9F E5 L...........D... 700000F0 = 1F 00 02 F1 00 D0 A0 E1 40 03 9F E5 13 00 02 F1 ........@....... J-Link>
※J-Link Commanderプロンプトから使用可能なコマンド一覧は以下URLのページからご確認ください。
https://wiki.segger.com/J-Link_Commander
「CS0 16-bit Parallel NOR Flash」から起動するようにRSKボードのブートモードを設定してボードに電源を入れます。
「J-Link Commander」ツールを起動し「connect」コマンドを実行してRZ/T2Mデバイスに接続します。
J-Linkプロンプトから以下順にコマンドを実行してNORフラッシュメモリデータのERASE、ファイルデータの書き込み及びデータベリファイ処理を確認します。※以下の事例に128kByteのバイナリデータをNORフラッシュに書き込みます。
J-Link>exec EnableEraseAllFlashBanks J-Link>erase 0x70000000 0x70020000 'erase': Performing implicit reset & halt of MCU. ResetTarget() start Reset: Halt core immediately after reset using reset catch. Authenticated device detected. Skipping authentication process. OCDREG_STATUS: 0x00000001 Disabled core power domain detected. Enabling debug mode... ResetTarget() end - Took 210ms Device specific reset executed. Erasing selected range... J-Link: Flash download: Total time needed: 1.238s (Prepare: 0.481s, Compare: 0.000s, Erase: 0.552s, Program: 0.000s, Verify: 0.000s, Restore: 0.204s) J-Link: Flash download: Flash sectors within Range [0x70000000 - 0x70020000] deleted. Erasing done. J-Link>mem 0x70000000, 40 70000000 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 70000010 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 70000020 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 70000030 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ J-Link> J-Link>loadfile C:\Workspace\RZ\rsk-t2m-nor.bin 0x70000000 'loadfile': Performing implicit reset & halt of MCU. ResetTarget() start Reset: Halt core immediately after reset using reset catch. Authenticated device detected. Skipping authentication process. OCDREG_STATUS: 0x00000001 Disabled core power domain detected. Enabling debug mode... ResetTarget() end - Took 233ms Device specific reset executed. Downloading file [C:\Workspace\RZ\rsk-t2m-nor.bin]... J-Link: Flash download: Bank 2 @ 0x70000000: 1 range affected (131072 bytes) J-Link: Flash download: Total: 1.245s (Prepare: 0.490s, Compare: 0.107s, Erase: 0.258s, Program: 0.110s, Verify: 0.072s, Restore: 0.206s) J-Link: Flash download: Program speed: 1163 KB/s O.K. J-Link>verifybin C:\Workspace\RZ\rsk-t2m-nor.bin 0x70000000 Loading binary file C:\Workspace\RZ\rsk-t2m-nor.bin Reading 131072 bytes data from target memory @ 0x70000000. Verify successful. J-Link>
XSPI0_CS0（0x60000000～）空間のQSPIフラッシュから起動するようにRSKボードのブートモードを設定してボードに電源を入れます。CN8ジャンパを（2-3ショート）に設定してQSPIフラッシュを選択します。Octal SPI（OSPI）フラッシュへの書き込みを行う場合は、CN8ジャンパを（1-2ショート）に設定します。
「J-Link Commander」ツールを起動し「connect」コマンドを実行してRZ/T2Mデバイスに接続します。
J-Linkプロンプトから以下順にコマンドを実行してQSPIフラッシュのERASE、ファイルデータの書き込み及びデータベリファイ処理を確認します。※以下の事例に1MByteのバイナリデータをSPIフラッシュに書き込みます。
J-Link>exec EnableEraseAllFlashBanks J-Link>erase 0x60000000 0x60100000 'erase': Performing implicit reset & halt of MCU. ResetTarget() start Reset: Halt core immediately after reset using reset catch. Authenticated device detected. Skipping authentication process. OCDREG_STATUS: 0x00000001 Disabled core power domain detected. Enabling debug mode... ResetTarget() end - Took 227ms Device specific reset executed. Erasing selected range... J-Link: Flash download: Total time needed: 5.124s (Prepare: 0.666s, Compare: 0.000s, Erase: 4.394s, Program: 0.000s, Verify: 0.000s, Restore: 0.063s) J-Link: Flash download: Flash sectors within Range [0x60000000 - 0x60100000] deleted. Erasing done. J-Link>mem 0x60000000, 40 60000000 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 60000010 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 60000020 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 60000030 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ J-Link>loadfile C:\Workspace\firmware.bin 0x60000000 'loadfile': Performing implicit reset & halt of MCU. ResetTarget() start Reset: Halt core immediately after reset using reset catch. Authenticated device detected. Skipping authentication process. OCDREG_STATUS: 0x00000001 Disabled core power domain detected. Enabling debug mode... ResetTarget() end - Took 224ms Device specific reset executed. Downloading file [C:\Workspace\firmware.bin]... J-Link: Flash download: Bank 0 @ 0x60000000: 1 range affected (1048576 bytes) J-Link: Flash download: Total: 15.582s (Prepare: 0.367s, Compare: 3.315s, Erase: 4.169s, Program: 6.047s, Verify: 1.617s, Restore: 0.064s) J-Link: Flash download: Program speed: 169 KB/s O.K. J-Link>verifybin C:\Workspace\firmware.bin 0x60000000 Loading binary file C:\Workspace\firmware.bin Reading 1043488 bytes data from target memory @ 0x60000000. Verify successful. J-Link>
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